Conduct full review of existing HPC EDA infrastructure with grid, OS, and EDA tools teams as well as engineering technical leaders and re architect the future global hybrid on prem and multi cloud HPC infrastructure that is highly efficient, utilized, scalable, and cost effective. Propose innovative approaches and work collaboratively with peer teams to maximize grid perf

Collaborate with AMD and VMware architects, Field Engineers, Partners and Customers to identify areas of integrations/enhancements/performance between AMD EPYC and VMware products. Work with stakeholders across companies to implement identified improvements end to end. Drive creation and publication of validated AMD EPYC based solutions on VMware product stack to drive cu

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Build the directed and random verification tests Debug test failures to determine the root cause; work with RTL an

Analyze power consumption of new and existing micro architectural features of Next Generation High Performance CPU Cores. Analyze power characteristics of the latest Server/Client CPU workloads and use the data to influence microarchitecture decisions. Collaborate with the RTL team to improve the implementation. Asist them in interpreting power analysis results from tools

Define and implement Micro Architecture of Next Generation High Performance Processor Cores Collaborate with the Physical Design Team to achieve high frequency and low power while utilizing the latest cutting edge fabrication technologies Work with a team of Hardware and Software Engineers to advance the Instruction Set Architecture Collaborate with the Design Verificatio

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

Engaging with software partner architects and engineers to jointly work on performanceoptimizations, develop benchmarking plans, develop technical collateral (presentations, whitepapers, etc.) to position ML compiler in target market segments, and co develop joint partner demos and proof points. The role may also work withpartners to create SOW for implementations as need

Work with cross functional teams to optimize various parts of the SW stack AI Compiler, AI frameworks, device drivers, and firmware. Work on block & system level performance analysis for VLIW based AI Engine processor architecture. Bring up emerging ML models based on CNN, transformers and characterize performance. Develop and validate VLIW based processor systems on both

We are looking for a Systems Design Engineer to join the System level Test team in San Jose. You will be involved in the silicon life cycle from testing of emulated next generation RTL through to silicon validation. You will have a view of the full system but also will become an expert in certain IP down to the register level. We are looking for someone who can span the r

Accelerate inference of Generative AI on AMD's products. Develop tools and techniques for model analysis, profiling, performance projections and analyzing architecture bottlenecks. Architect and prototype custom kernels on GPUs and CPUs ( HIP, CUDA, OpenCL, Triton, etc.) Optimize deep learning inference pipeline including graph compilation using AMD AI compilers. Reproduc

Accelerate inference of Generative AI on AMD's products. Develop tools and techniques for model analysis, profiling, performance projections and analyzing architecture bottlenecks. Architect and prototype custom kernels on GPUs and CPUs (HIP, CUDA, OpenCL, Triton, etc.) Optimize deep learning inference pipeline including graph compilation using AMD AI compilers. Reproduce

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

Minimum of 10 years' experience in leading design teams in system level design, from concept to component selection and schematic capture through layout, bring up, debug, validation to high volume production. Experience working in dynamic, ever changing fast paced environment Strong cross functional collaboration a must Strong background in high speed board designing for

Participate and play critical role in planning project deliverables Own and drive software design, development, verification and release the product to customers Performing individual goal planning and evaluation in accordance with AMD policies Develop and grow the engineering skills of the team Drive critical issues and interface with cross functional teams PREFERRED EXP

Runtime Wrapper Development Design and implement C++ runtime wrappers , APIs, and frameworks for ML model execution. Collaborate with kernel developers to integrate ML operators seamlessly into high level ML frameworks like ONNX . Model Loading and Inference Interface with ONNX / Pytorch runtime engines to deploy the model on CPUs. Develop efficient model loading mechanis